Microprocessor preventing erroneous writing to control register

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation

Reexamination Certificate

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C710S048000, C711S163000

Reexamination Certificate

active

06938107

ABSTRACT:
A transfer circuit transfers a write inhibit address stored in a ROM to an address register. An access preventing circuit inhibits writing to a control register by a CPU when an address outputted from the CPU coincides with a write inhibit address stored in the address register. Since the address register is a register to which data cannot be written by the CPU, a write inhibit address stored in the address register is not changed. Therefore, the write inhibition to the control register is not canceled, so that erroneous operation of the CPU can be prevented.

REFERENCES:
patent: 5097445 (1992-03-01), Yamauchi
patent: 5600818 (1997-02-01), Weikmann
patent: 6126070 (2000-10-01), Fukuzumi
patent: 6367050 (2002-04-01), Akao et al.
patent: 6584540 (2003-06-01), Shinmori
patent: 6715049 (2004-03-01), Hayakashi
patent: 05-101203 (1993-04-01), None

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