High-voltage, high-cutoff-frequency electronic MOS device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S341000, C257S374000, C257S389000, C257S409000, C257S395000, C257S346000

Reexamination Certificate

active

06906389

ABSTRACT:
An MOS electronic device is formed to reduce drain/gate capacity and to increase cutoff frequency. The device includes a field insulating layer that covers a drain region, delimits an active area with an opening, houses a body region in the active area, and houses a source region in the body region. A portion of the body region between drain and source regions forms a channel region. A polycrystalline silicon structure extends along the edge of the opening, partially on the field insulating and active layers. The polycrystalline silicon structure includes a gate region extending along a first portion of the edge on the channel region and partially surrounding the source region and a non-operative region extending along a second portion of the edge, electrically insulated and at a distance from the gate region.

REFERENCES:
patent: 4399449 (1983-08-01), Herman et al.
patent: 5912495 (1999-06-01), Depetro et al.
patent: 6093588 (2000-07-01), De Petro et al.
patent: 2001/0038125 (2001-11-01), Ohyanagi et al.
patent: 0 047 392 (1982-03-01), None

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