Method of manufacturing semiconductor device and...

Details Method of manufacturing semiconductor device and... Method of manufacturing semiconductor device and...

2005-12-13

2005-12-13

Le, Thao P. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S311000, C438S197000

Reexamination Certificate

active

06974982

ABSTRACT:
Impurity ions are implanted into the silicon layer of an SOI substrate to achieve an ion concentration distribution which inhibits for a reduction in threshold voltage (Vth-rolloff) as a gate length is reduced. A reduction in potential barrier which runs from a drain region side is effectively inhibited to counter short channel effects resulting from a reduction in gate length attendant with miniaturization of SOI-MOSFETs.

REFERENCES:
patent: 6495898 (2002-12-01), Iwamatsu et al.
patent: 6627505 (2003-09-01), Adan
Jeffrey W. Thomas et al., “Characteristics of Submicrometer LOCOS Isolation”, 1995 IEEE International SOI Conferences, Oct. 1995, pp. 116-117.

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