Semiconductor-device design method, semiconductor-device...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

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06971078

ABSTRACT:
A semiconductor-device design method considering change in capacitance between wiring patterns due to an inserted dummy pattern. An information reception part receives dummy rule information about rules for dummy patterns and process information about wiring structure of wiring patterns. A capacitance calculation part calculates a capacitance value for each of wiring distances between the wiring patterns defined by the process information, under the condition that a dummy pattern defined by the dummy rule information is inserted between the wiring patterns. A wiring-pattern capacitance calculation part calculates capacitance values between wiring patterns of an intended semiconductor device defined by layout data stored in a layout database, referring to the capacitance values calculated by the capacitance calculation part. Thus, a semiconductor device considering change in capacitance between wiring patterns due to an inserted dummy pattern is designed.

REFERENCES:
patent: 6178543 (2001-01-01), Chen et al.
patent: 6243653 (2001-06-01), Findley
patent: 6678879 (2004-01-01), Hawse et al.
patent: 2002/0162082 (2002-10-01), Cwynar et al.
patent: 2003/0177464 (2003-09-01), Takechi et al.
patent: 2003/0229875 (2003-12-01), Smith et al.

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