Memory device and method of storing fail addresses of a...

Details Memory device and method of storing fail addresses of a... Memory device and method of storing fail addresses of a...

2005-08-30

2005-08-30

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000, C365S189050

Reexamination Certificate

active

06937531

ABSTRACT:
The embodiments of the present invention are directed to a self-repair schema for memory chips, using a sortable fail-count/fail-address register. The embodiments of the present invention utilize the available redundancy efficiently by scanning the memory array to locate the n elements (WLs or CSLs) with the highest number of defects. A circuit preferably comprises one or more comparators to compare a fail count of an address in an input register with at least one fail count stored in the sortable fail-count/fail-address register. The embodiments of the present invention can be used for an on-chip redundancy calculation and can handle a two dimensional (i.e. row and column) redundancy.

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International Search Report for counterpart international patent application number PCT/EP2004/07740, dated Nov. 9, 2004, 7 pages.

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