Electrical computers and digital processing systems: memory – Storage accessing and control
Patent
1996-07-29
1998-07-28
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
711105, 711181, 365154, G06F 1200, G06F 1300
Patent
active
057874565
ABSTRACT:
A semiconductor memory device includes a memory cell array, a data latch signal generator and a data latch circuit latching data read from the memory cell array in response to a latch signal from the data latch signal generator. The data latch signal generator includes a F/F which is set in response to a CAS signal and reset in response to a RAS signal, and a delay element which delays a signal from the F/F to generate the data latch signal.
REFERENCES:
NEC Technical Journal, vol. 47, No. 3 (Serial 301) Apr. 1994, pp. 74-83.
NEC Corporation
Swann Tod R.
Thai Tuan V.
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