Reduced-capacitance bus switch in isolated P-well shorted to...

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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C326S083000, C327S535000

Reexamination Certificate

active

06965253

ABSTRACT:
A bus switch has reduced input capacitance. Parasitic source-to-well and drain-to-well capacitors are shorted by well-shorting transistors, eliminating these parasitic capacitances. The well-shorting transistors are turned on when the bus-switch transistor is turned on, but are turned off when the bus-switch transistor is turned off and the bus switch isolates signals on its source and drain. The isolated P-well under the bus-switch transistor and the well-shorting transistors is not tied to ground. Instead the isolated P-well is floating when the bus-switch transistor is turned on. When the bus-switch transistor is turned off, the underlying isolated P-well is driven to ground by a biasing transistor in another P-well. Since the isolated P-well has a much lower doping than the N+ source and drain, the capacitance of the well-to-substrate junction is much less than the source-to-well capacitance. Thus input capacitance is reduced, allowing higher frequency switching.

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