High performance FET devices and methods therefor

Details High performance FET devices and methods therefor High performance FET devices and methods therefor

2005-06-21

2005-06-21

Tran, Minh-Loan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S411000, C257S412000, C257S407000

Reexamination Certificate

active

06909186

ABSTRACT:
Structure and methods of fabrication are disclosed for an enhanced FET devices in which dopant impurities are prevented from diffusing through the gate insulator. The structure comprises a Si:C, or SiGe:C, layer which is sandwiched between the gate insulator and a layer which is doped with impurities in order to provide a preselected workfunction. It is further disclosed how this, and further improvements for FET devices, such as raised source/drain and multifaceted gate on insulator, MODFET on insulator are integrated with strained Si based layer on insulator technology.

REFERENCES:
patent: 6218711 (2001-04-01), Yu
patent: 6352872 (2002-03-01), Kim
patent: 6395589 (2002-05-01), Yu
patent: 6406951 (2002-06-01), Yu
patent: 6492694 (2002-12-01), Noble et al.
patent: 6537369 (2003-03-01), Saitoh
patent: 6603156 (2003-08-01), Rim
patent: 6624483 (2003-09-01), Kurata
patent: 6727550 (2004-04-01), Tezuka et al.

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