Active matrix display device with shared retaining circuit

Details Active matrix display device with shared retaining circuit Active matrix display device with shared retaining circuit

2005-11-08

2005-11-08

Awad, Amr A. (Department: 2675)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S214000, C345S093000, C345S097000, C345S211000

Reexamination Certificate

active

06963324

ABSTRACT:
The switching between the normal operation mode and the memory operation mode is achieved by disposing one retaining circuit110for a plurality of pixel elements (for example, 2 or 4 pixel elements). The retaining circuit110, which is a SRAM, requires considerable circuit space. The sharing of one retaining circuit by a plurality of the pixel elements enables the reduction of the seeming “number of the pixel elements” under the memory operation mode. This can lead to the size reduction of the pixel element, achieving the finer display under the normal operation mode. Also, the reduction in the number of the retaining circuits can further reduce the energy consumption under the memory operation mode, comparing to the case where the retaining circuit110is disposed for each of the pixel elements.

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