Method of connecting core I/O pins to backside chip I/O pads

Details Method of connecting core I/O pins to backside chip I/O pads Method of connecting core I/O pins to backside chip I/O pads

2005-11-01

2005-11-01

Eckert, George (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S503000, C257S697000

Reexamination Certificate

active

06960837

ABSTRACT:
An integrated circuit, comprising: a predefined block of functional circuitry having a plurality of I/O pins; and a backside I/O pad electrically connected to each I/O pin through a backside via of the integrated circuit.

REFERENCES:
patent: 4617730 (1986-10-01), Geldermans et al.
patent: 5375042 (1994-12-01), Arima et al.
patent: 5406125 (1995-04-01), Johnson et al.
patent: 6075712 (2000-06-01), McMahon
patent: 6291272 (2001-09-01), Giri et al.
patent: 6617681 (2003-09-01), Bohr

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