Method of filling bit line contact via

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S622000

Reexamination Certificate

active

06908840

ABSTRACT:
A method of filling a bit line contact via. The method includes providing a substrate having a transistor, with a gate electrode, drain region, and source region, on the substrate, forming a first barrier layer overlying the sidewall of the gate electrode, drain region, and source region, forming a first conductive layer overlying the first barrier layer, removing the first barrier layer and first conductive layer above the source region, forming an insulating barrier layer overlying the substrate, forming a first dielectric layer overlying the insulating barrier layer above the source region, forming a second dielectric layer overlying the substrate, forming a via through the second dielectric layer and the insulative barrier layer, exposing the first conductive layer, forming a second barrier layer overlying the surface of the via, and filling the via with a second conductive layer.

REFERENCES:
patent: 6028360 (2000-02-01), Nakamura et al.
patent: 6686239 (2004-02-01), Nam et al.
patent: 6723597 (2004-04-01), Abbott et al.
patent: 6852619 (2005-02-01), Okabe

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