Method of fabricating integrated circuitry

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S637000, C438S706000, C438S745000

Reexamination Certificate

active

06933224

ABSTRACT:
The invention includes methods of fabricating integrated circuitry. In one implementation, at least two different elevation conductive metal lines are formed relative to a substrate. Then, interconnecting vias are formed in a common masking step between, a) respective of the at least two different elevation conductive metal lines, and b) respective conductive nodes. Interconnecting conductive metal is provided within the interconnecting vias. Other aspects and implementations are contemplated.

REFERENCES:
patent: 4840923 (1989-06-01), Flagello et al.
patent: 5895264 (1999-04-01), Teo
patent: 6635515 (2003-10-01), Okuaki

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