Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-06-21
2005-06-21
Whitmore, Stacy A. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06910193
ABSTRACT:
The present invention is generally directed to a system and method for performing evaluation tests on a circuit design. Specifically, the present invention is directed to a system and method that controllably executes test routines on a netlist file. Broadly, the system of the present invention is a software package that is configured to execute a wide variety of tests, checks, or evaluations on a circuit design, as defined by a netlist file. An inventive aspect lies in the controllable execution of the various tests, checks, and evaluations, whereby certain tests may be omitted. In accordance with this novel aspect of the invention, the program may look to one or more files that contain a listing of tests that would otherwise be performed by the program, but which the program omits if listed in any of the one or more exclusion files. Preferably, the system employs two such exclusion files: one which is located in a “local” directory (i.e., the same location from which the program is being launched), and a “global” exclusion file, which is located in a predetermined, or specified, location.
REFERENCES:
patent: 6053947 (2000-04-01), Parson
patent: 6094654 (2000-07-01), Van Huben
Microsoft, “Microsoft Press Computer Dictionary, 3rdEd.”, 1997. pp. 96, 148, 194, 415, and 441.
Microsoft, “Microsoft Press Computer Dictionary, 3rdEd.”, 1997. pp. 96, 148, 194, 415, and 441.
Hewlett--Packard Development Company, L.P.
Whitmore Stacy A.
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