Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2005-11-29
2005-11-29
Anderson, Matthew D. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S104000
Reexamination Certificate
active
06970988
ABSTRACT:
A smart memory computing system that uses smart memory for massive data storage as well as for massive parallel execution is disclosed. The data stored in the smart memory can be accessed just like the conventional main memory, but the smart memory also has many execution units to process data in situ. The smart memory computing system offers improved performance and reduced costs for those programs having massive data-level parallelism. This smart memory computing system is able to take advantage of data-level parallelism to improve execution speed by, for example, use of inventive aspects such as algorithm mapping, compiler techniques, architecture features, and specialized instruction sets.
REFERENCES:
patent: 4823257 (1989-04-01), Tonomura
patent: 4873630 (1989-10-01), Rusterholz et al.
patent: 5226171 (1993-07-01), Hall et al.
patent: 5301340 (1994-04-01), Cook
patent: 5396641 (1995-03-01), Iobst et al.
patent: 5678021 (1997-10-01), Pawate et al.
patent: 5983004 (1999-11-01), Shaw et al.
patent: 6292903 (2001-09-01), Coteus et al.
patent: 6741616 (2004-05-01), Sutherland et al.
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