Device-managed host buffer

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Details

C711S113000, C711S122000

Reexamination Certificate

active

06981123

ABSTRACT:
A method and apparatus is provided to virtually increase the size of the memory cache of a peripheral device without additional cost. A portion of the memory space of a host computer is used as additional cache memory for the peripheral device. The peripheral device and the host computer may be interfaced with an interface that has a first-party direct memory access (FPDMA) mechanism, for example, IEEE 1394 or Serial ATA. FPDMA allows the peripheral device to access the memory space of the host computer under the control of the peripheral device. The host computer provides the peripheral device with the location of the additional cache memory. The peripheral device can transfer data to and from the additional cache memory via FPDMA. The peripheral device effectively manages the additional cache memory as part of the peripheral device's own cache.

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patent: 6539460 (2003-03-01), Castelli et al.
patent: 2001/0033450 (2001-10-01), Bryant

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