Method of forming a polysilicon layer comprising...

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Polycrystalline semiconductor

Reexamination Certificate

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C438S647000

Reexamination Certificate

active

06962861

ABSTRACT:
A method of forming a flash memory cell includes providing a substrate, forming an oxide layer over the substrate, forming a polysilicon floating gate over the oxide layer including providing a bottom seed layer having microcrystalline polysilicon, providing an upper amorphous silicon layer over the bottom seed layer, and annealing the upper amorphous silicon layer, providing an inter-poly dielectric layer over the floating gate, and forming a polysilicon control gate over the inter-poly dielectric layer.

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patent: 6667525 (2003-12-01), Rhee et al.
patent: 6713364 (2004-03-01), Kirchhoff
T.C. Ong, et al., “Erratic Erase in ETOX™ Flash Memory Array,” IEEE VLSI Symposium, 1993, pp. 83-84.
V. Subramanian et al., “A Novel Technique for 3-D Integration: Ge-seeded Laterally Crystallized TFTs”, IEEE VLSI Symposium, 1997.
Tuung Luoh et al., “Single-Wafer Polysilicon Engineering for the Improvement of Over Erase in a 0.18-μm Floating-Gate Flash Memory,” IEEE Transactions on Semiconductor Manufacturing, vol. 16, No. 2, May 2003, pp. 155-164.

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