Chip package structure having π filter

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S664000, C257S676000, C257S700000

Reexamination Certificate

active

06870250

ABSTRACT:
A chip package structure having a substrate therein for accommodating a die. Power regions supplying power to various control units within the die are grouped together into at least two sections. At least one π filter is used to isolate different power regions on the substrate so that cross interference of noise signals are reduced and stability of the chip is improved. The π filter is positioned close to one of the corners of the substrate so that the layout of wiring on the substrate is facilitated.

REFERENCES:
patent: 6049702 (2000-04-01), Tham et al.
patent: 6124625 (2000-09-01), Chern et al.
patent: 20010024360 (2001-09-01), Hirata et al.
patent: 20010042899 (2001-11-01), Protigal et al.
patent: 7074322 (1993-08-01), None

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