Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-02-08
2005-02-08
Whitmore, Stacy A. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06854095
ABSTRACT:
A designing method of an electronic device is provided. An STI structure, a wiring structure and the like defines a first area ratio range and a second area ratio range that are permissible in order to obtain satisfactory polishing results. A region to be polished is divided into first smaller areas, an area ratio of each of which is adjusted to meet the first area ratio range. The region to be polished is divided into second smaller areas, which are larger than the first smaller areas. An area ratio of each is adjusted to meet the second area ratio range, thereby providing satisfactory planarity of the region to be polished without producing depressions due to erosion caused by differing polishing speeds caused by differing densities of the regions to be polished.
REFERENCES:
patent: 6317353 (2001-11-01), Ikeda et al.
patent: 6682398 (2004-01-01), Meyer
patent: 20020157076 (2002-10-01), Asakawa
patent: 20020162082 (2002-10-01), Cwynar et al.
patent: 20030070149 (2003-04-01), Mizumasa
patent: 09102539 (1997-04-01), None
patent: 101730035 (1998-06-01), None
patent: 2001007114 (2001-01-01), None
LandOfFree
Designing method and a manufacturing method of an electronic... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Designing method and a manufacturing method of an electronic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Designing method and a manufacturing method of an electronic... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3457065