Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-05-17
2005-05-17
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S314000, C438S262000
Reexamination Certificate
active
06894340
ABSTRACT:
A process and structure for fabricating a non-volatile memory cell through the formation of a source and drain region and a charge trapping layer located therebetween is presented. E-fields for generating trapped charges are formed through using poly-edge discharge techniques wherein the gate structures of the memory cells are laterally separated from the vertical region of the source and drain regions. The gate structure forms a laterally directed e-field through the charge trapping layer to one of the source and drain regions which enables the charge to be trapped and retained in an area that is lateral to the source and drain regions. Lateral separation of the gate from the source and drain regions is maintained through the use of spacers which may take the form of insulated polysilicon structures or in an alternate embodiment may take the form of insulating spacers located on the sidewalls of the gate structure.
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Kuo Tung Chen
Lung Hsiang Lan
Flynn Nathan J.
Macronix International
Mondt Johannes
Workman Nydegger
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