Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-02-01
2005-02-01
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S005000, C365S185250, C365S222000
Reexamination Certificate
active
06851017
ABSTRACT:
The present invention provides a semiconductor memory capable of shortening a refresh cycle time and reducing power consumption at refresh. The semiconductor memory includes an address input circuit for generating each of internal address signals, a redundant judgement circuit for receiving the internal address signal therein and determining whether the corresponding address corresponds to an address for a defective word line of a plurality of normal word lines, and an address counter for generating refresh address signals for sequentially refreshing the plurality of normal word lines and redundant word lines. The redundant judgment circuit is deactivated upon refresh.
REFERENCES:
patent: 6115302 (2000-09-01), Proebsting
patent: 6134176 (2000-10-01), Proebsting
patent: 6212118 (2001-04-01), Fujita
patent: 61-71491 (1984-09-01), None
Horiguchi Masashi
Ueda Shigeki
Yahata Hideharu
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Moazzami Nasser
Reed Smith LLP
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