Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Decoding
Reexamination Certificate
2005-08-02
2005-08-02
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Function of and, or, nand, nor, or not
Decoding
C326S098000, C326S121000, C365S230060
Reexamination Certificate
active
06924670
ABSTRACT:
A muxed-decoder circuit including multiple complementary input dynamic circuits and an AND logic gate. Each complementary input dynamic circuit includes a complementary P-logic AND dynamic circuit, a complementary N-logic AND dynamic circuit and a pass device. The complementary P-logic AND dynamic circuit has an output coupled to a corresponding output evaluation node, and evaluates bits of an encoded address value corresponding and bits of a digital select value having a logic state for selecting the encoded address. The complementary N-logic AND dynamic circuit has an output coupled to a corresponding preliminary evaluation node, and evaluates inverted bits of the address value and the digital select value. The pass device is coupled between corresponding first and second evaluation nodes and drives the second evaluation node low if the complementary N-logic AND dynamic circuit fails to evaluate. The AND logic gate couples to the output evaluation nodes and provides a corresponding decoded bit.
REFERENCES:
patent: 5015882 (1991-05-01), Houston et al.
patent: 5399921 (1995-03-01), Dobbelaere
patent: 5440243 (1995-08-01), Lyon
patent: 5525916 (1996-06-01), Gu et al.
patent: 6081136 (2000-06-01), Khanna et al.
patent: 6388489 (2002-05-01), Fetzer et al.
patent: 6486706 (2002-11-01), Ye et al.
patent: 6549060 (2003-04-01), Mellinger et al.
patent: 6707753 (2004-03-01), Clark et al.
patent: 2002/0021145 (2002-02-01), Deng
patent: 2002/0024358 (2002-02-01), Deng
Samuel D. Naffziger, Glenn Colon-Bonet, Timothy Fischer, Reid Riedlinger, Thomas J. Sullivan, and Tom Grutkowski; “The Implementation of the itanium 2 Microprocessor”; IEEE Journal of Solid-State Circuit; vol. 37, No. 11; Nov. 2002; S.D. Naffziger, G. Colon-Bonet, T. Fischer, R. Riedlinger, and T.J. Sullivan are with Hewlett Packard Company, Ft. Collins, CO USA; T. Grutkowski is with the Intel Corporation, Santa Clara, CA 80525 USA.
Cho James H.
Huffman James W.
Huffman Richard K.
IP-First LLC
Stanford Gary R.
LandOfFree
Complementary input dynamic muxed-decoder does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Complementary input dynamic muxed-decoder, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Complementary input dynamic muxed-decoder will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3447179