Apparatus and method for testing memory in a microprocessor

Details Apparatus and method for testing memory in a microprocessor Apparatus and method for testing memory in a microprocessor

2005-03-01

2005-03-01

Tu, Christine T. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S031000

Reexamination Certificate

active

06862704

ABSTRACT:
An apparatus and method are provided for testing memory circuits in a microprocessor. The apparatus includes test management logic and test execution logic located within the microprocessor. The test management logic has a non-specific test program stored therein, and it accepts test parameters provided by an external test controller. The test parameters are applied to the non-specific test program to produce a specific test program by inserting the test parameters in place of a plurality of non-specific test operands. The test execution logic executes the specific test program to test the memory circuits within the microprocessor at the internal speed of the microprocessor.

REFERENCES:
patent: 5819025 (1998-10-01), Williams
patent: 5961653 (1999-10-01), Kalter et al.
patent: 6003142 (1999-12-01), Mori
patent: 6370661 (2002-04-01), Miner
patent: 6493839 (2002-12-01), Miner

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