Method and apparatus for parity error recovery

Details Method and apparatus for parity error recovery Method and apparatus for parity error recovery

2005-09-27

2005-09-27

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

C714S002000

Reexamination Certificate

active

06950978

ABSTRACT:
A method, apparatus, and computer implemented instructions for processing and recovering from soft errors in computer array with a parity error checking design in a data processing system. In response to an occurrence of a parity error, processor status information is stored to form stored processor information. A determination is made as to whether the parity error is a recoverable parity error using the stored processor information. In response to the parity error being a recoverable parity error, a recovery action is performed. The specific action taken varies depending on the type of error.

REFERENCES:
patent: 5659678 (1997-08-01), Aichelmann et al.
patent: 6012148 (2000-01-01), Laberge et al.
patent: 6014756 (2000-01-01), Dottling et al.
patent: 6332181 (2001-12-01), Bossen et al.
patent: 6445717 (2002-09-01), Gibson et al.
patent: 6615374 (2003-09-01), Moran
patent: 6625749 (2003-09-01), Quach
patent: 6625756 (2003-09-01), Grochowski et al.
patent: 2002/0188895 (2002-12-01), Quach et al.

Affiliated with

Also associated with

Rating

Method and apparatus for parity error recovery does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for parity error recovery, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for parity error recovery will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3444949