Distributed content addressable memory

Details Distributed content addressable memory Distributed content addressable memory

2005-10-25

2005-10-25

Lane, Jack A. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C365S108000

Reexamination Certificate

active

06959358

ABSTRACT:
The present invention provides a large capacity distributed content addressable memory (CAM) made up of a plurality of smaller CAMs interconnected on a high speed data bus. Each of the smaller CAMs is located at a local node on the data bus and configured to receive commands originating from both the local node in which the CAM is located and a local node in which another CAM on the data bus is located. As the resources and the data being stored by all the CAMs are shared through the high speed data bus, the aggregate contents of all the CAMs can be viewed as being stored in a single virtual CAM.

REFERENCES:
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patent: 2002/0078310 (2002-06-01), Frank et al.
“What is a CAM (Content-Addressable Memory)?” Music Semiconductors Application Brief AB-N6, Rev. 2a, Sep. 30, 1998, 4pp.
“Advantages of CAM in ASIC-Based Network Address Processing,” Music Semiconductors Application Brief AB-N11, Rev. 1.2a Draft, Sep. 30, 1998, 4pp.

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