Semiconductor device having improved alignment of an...

Active solid-state devices (e.g. – transistors – solid-state diode – Voltage variable capacitance device – Plural diodes in same non-isolated structure – or device...

Reexamination Certificate

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C257S577000, C257S910000

Reexamination Certificate

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06867478

ABSTRACT:
A semiconductor device manufacturing method is used for packaging a thin semiconductor chip in an economical manner. A semiconductor chip having one electrode terminal, a first member having a first conductor on its surface, and a second member having a second conductor on its surface are prepared. The first and second members are positioned such that the first and second conductors face each other, and the semiconductor chip is held between the members. In this arrangement, one of the first and second conductors is in electrical contact with the first electrode.

REFERENCES:
patent: 4709253 (1987-11-01), Walters
patent: 4731643 (1988-03-01), Dunham et al.
patent: 5691556 (1997-11-01), Saito et al.
patent: 5721452 (1998-02-01), Fogal et al.
patent: 6275681 (2001-08-01), Vega et al.
patent: 6414543 (2002-07-01), Beigel et al.
patent: 0465253 (1992-08-01), None
patent: 2000-032737 (2000-02-01), None
Japanese patent application 08-316194.

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