Trench power MOSFET with planarized gate bus

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S330000, C257S331000, C257S332000, C257S383000, C438S259000, C438S270000, C438S271000, C438S589000

Reexamination Certificate

active

06861701

ABSTRACT:
Power MOSFETs and fabrication processes for power MOSFETs use a continuous conductive gate structure within trenches to avoid problems arising from device topology caused when a gate bus extends above a substrate surface. The conductive gate structure forms gates in device trenches in an active device region and forms a gate bus in a gate bus trench. The gate bus trench that connects to the device trenches can be wide to facilitate forming a gate contact to the gate bus, while the device trenches can be narrow to maximize device density. CMP process can be used to planarize the conductive gate structure and/or overlying insulating layers. The processes are compatible with processes forming self-aligned or conventional contacts in the active device region.

REFERENCES:
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patent: 6303436 (2001-10-01), Sung
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patent: 6673680 (2004-01-01), Calafut
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patent: 20040058481 (2004-03-01), Xu et al.

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