Multichip module, manufacturing method thereof, multichip...

Details Multichip module, manufacturing method thereof, multichip... Multichip module, manufacturing method thereof, multichip...

2005-04-26

2005-04-26

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S702000, C257S081000, C257S099000

Reexamination Certificate

active

06885099

ABSTRACT:
Reduction of parasitic capacitance originated between semiconductor chip and optical chip by reducing the connection distance thereof by means of interlayer-connecting the semiconductor chip mounted on a surface of a resin layer and the optical chip buried on another surface of the resin layer with an interlayer via.

REFERENCES:
patent: 5362976 (1994-11-01), Suzuki
patent: 6121675 (2000-09-01), Fukamura et al.
patent: 6605828 (2003-08-01), Schwarzrock et al.
patent: 6617702 (2003-09-01), Hsu et al.
patent: 20040214380 (2004-10-01), Leib et al.

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