Dynamic semiconductor memory device and method of...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S189050, C365S230060

Reexamination Certificate

active

06898141

ABSTRACT:
A dynamic semiconductor memory device and a refresh control method for reducing refresh current are disclosed. The device according to the present invention to include a flip-flop, receiving a word line supplied from a row decoder and a write command signal for commanding write operation, for storing and holding a value indicating the presence of a write history when the word line and the write command signal are activated, and a control circuit, receiving an output of the flip-flop, a word line, a refresh command signal on a word line, for exercising control so that when the word line and the refresh command signal are activated, in case of the output of said flop-flop indicating a value representative of the presence of the write history, a normal refresh operation is performed, and in case of the output of said latch circuit indicating a value representative of the absence of the write history, one of control signals for controlling sensing operation by a sense amplifier is inactivated, thereby stopping the refresh operation.

REFERENCES:
patent: 6094705 (2000-07-01), Song
patent: 6504787 (2003-01-01), Tsubouchi et al.
patent: 6510094 (2003-01-01), Chung et al.
patent: 6813212 (2004-11-01), Takahashi et al.
patent: 2991114 (1997-12-01), None
patent: 2000-113667 (2000-04-01), None

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