Color burst queue for a shared memory controller in a color...

Computer graphics processing and selective visual display system – Computer graphics display memory system – Frame buffer

Reexamination Certificate

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Details

C345S591000, C345S593000, C345S603000, C345S604000

Reexamination Certificate

active

06891545

ABSTRACT:
A system and method for managing memory in display processing circuit for use with a color sequential display. The system comprises: a shared memory; and a storage queue coupled to the shared memory, wherein the storage queue includes: a system for receiving and storing alternating packets of color-specific video data in the storage queue; and a system for separately reading contiguous sets color-specific packets from the storage queue to the shared memory.

REFERENCES:
patent: 4914508 (1990-04-01), Music et al.
patent: 6072545 (2000-06-01), Gribschaw et al.
patent: 6396596 (2002-05-01), Hosier et al.
patent: 6430180 (2002-08-01), Bohm et al.
patent: 20030169755 (2003-09-01), Ternovsky

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