Methods and circuits for stacking bus architecture

Details Methods and circuits for stacking bus architecture Methods and circuits for stacking bus architecture

2005-07-19

2005-07-19

Myers, Paul R. (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C370S492000

Reexamination Certificate

active

06920520

ABSTRACT:
A system for connecting multiple repeaters into a single collision domain comprising a first repeater, a second repeater and a stacking bus. The first repeater has a plurality of network ports. The second repeater also has a plurality of network ports. The stacking bus connects the first repeater and the second repeater and is configured to relay status signals between the first and said second repeaters.

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