Memory device and method for selectable sub-array activation

Details Memory device and method for selectable sub-array activation Memory device and method for selectable sub-array activation

2005-05-17

2005-05-17

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

With shift register

C365S189040, C365S220000, C365S230030

Reexamination Certificate

active

06894936

ABSTRACT:
A memory device and method for selectable sub-array activation. In one preferred embodiment, a memory array is provided comprising a plurality of groups of sub-arrays and circuitry operative to simultaneously write data into and/or read data from a selected number of groups of sub-arrays. By selecting the number of groups of sub-arrays into which data is written and/or from which data is read, the write and/or read data rate is varied. Such varying can be used to prevent thermal run-away of the memory array. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.

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