Compliant test probe with jagged contact surface

Details Compliant test probe with jagged contact surface Compliant test probe with jagged contact surface

2005-01-25

2005-01-25

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S117000, C438S614000, C257S737000, C257S780000

Reexamination Certificate

active

06846735

ABSTRACT:
A test probe includes a conductive trace with a bumped terminal, the bumped terminal includes a jagged contact surface and a cavity that face in opposite directions, and the contact surface includes a plated metal. The contact surface is jagged due to particles which may protrude, be covered or dislodged. Preferably, the test probe includes an elastomer that fills the cavity so that the bumped terminal is compliant. The test probe is well-suited for pressure contact with semiconductor chips, BGA packages and other electronic devices.

REFERENCES:
patent: 5076485 (1991-12-01), MacKay
patent: 5083697 (1992-01-01), Defrancesco
patent: 5199918 (1993-04-01), Kumar
patent: 5625298 (1997-04-01), Hirano et al.
patent: 5635846 (1997-06-01), Beaman et al.
patent: 5785538 (1998-07-01), Beaman et al.
patent: 5838160 (1998-11-01), Beaman et al.
patent: 5931685 (1999-08-01), Hembree et al.
patent: 5973405 (1999-10-01), Keukelaar et al.
patent: 6159770 (2000-12-01), Tetaka et al.
patent: 6162652 (2000-12-01), Dass et al.
patent: 6180221 (2001-01-01), Crotzer et al.
patent: 6194904 (2001-02-01), Clayton et al.
patent: D444401 (2001-07-01), Campbell
patent: D444720 (2001-07-01), Campbell
patent: 6330744 (2001-12-01), Doherty et al.
patent: 6334247 (2002-01-01), Beaman et al.
patent: 6336269 (2002-01-01), Eldridge et al.
patent: 6518781 (2003-02-01), Masuda
patent: 6653742 (2003-11-01), Lin
patent: 6713374 (2004-03-01), Eldridge et al.
U.S. Appl. No. 09/878,626 filed Jun. 11, 2001 entitled “Method of Connecting a Conductive Trace to a Semiconductor Chip”.
U.S. Appl. No. 09/997,973 filed Nov. 29, 2001, entitled “Method of Connecting a Bumped Conductive Trace to a Semiconductor Chip”.
Crowley, “Socket Developments for CSP and FBGA Packages,” Chip Scale Review, May 1998, pp. 37-40.
Forster, “Socket Challenges for Chip-Scale Packages,” Chip Scale Review, May 1998, pp. 43-47.
Zou et al., “A New Electrical Surface Joining Technology For Flip Chip Application,” 2001 International Symposium on Microelectronics, pp. 565-570.

Affiliated with

Also associated with

Rating

Compliant test probe with jagged contact surface does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Compliant test probe with jagged contact surface, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Compliant test probe with jagged contact surface will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3397936