Semiconductor memory device and its manufacturing method

Details Semiconductor memory device and its manufacturing method Semiconductor memory device and its manufacturing method

2005-05-24

2005-05-24

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S298000, C257S303000, C257S306000, C257S324000, C438S003000, C438S240000

Reexamination Certificate

active

06897502

ABSTRACT:
A first impurity diffusion area is formed in the semiconductor substrate at a bottom of the first trench formed in a surface of the semiconductor substrate. A second impurity diffusion area is formed in the surface of the semiconductor substrate, each have one end contacting a first side wall of the first trench, and each have the same conductive type as the first impurity diffusion area. A first gate electrode is provided on the first side wall between the first and second impurity diffusion areas with a gate insulating film interposed therebetween. A first ferroelectric film is provided on a first lower electrode, which is provided on the second impurity area. A first upper electrode is provided on the first ferroelectric film. A first interconnection layer is provided above the first upper electrode. A first contact plug electrically connects the first interconnection layer and first impurity diffusion area.

REFERENCES:
patent: 5300804 (1994-04-01), Arai
patent: 6593613 (2003-07-01), Alsmeier et al.
patent: 6717200 (2004-04-01), Schamberger et al.
patent: 10-255483 (1998-09-01), None
patent: 2002-329795 (2002-11-01), None

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