Semiconductor memory device with memory cell array divided...

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S230030

Reexamination Certificate

active

06914832

ABSTRACT:
A semiconductor memory device includes a plurality of blocks, each of which includes a memory cell array, and outputs data signals and a redundancy signal. The semiconductor memory device further includes at least one first multiplexer which is coupled to the blocks, and selects one of the blocks, and a second multiplexer which performs redundancy processing based on the data signals and the redundancy signal which have undergone block selection by the first multiplexer.

REFERENCES:
patent: 5268866 (1993-12-01), Feng et al.
patent: 5673227 (1997-09-01), Engles et al.
patent: 5953745 (1999-09-01), Lattimore et al.
patent: 6560728 (2003-05-01), Merritt
patent: 6-150644 (1994-05-01), None

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