Distributed memory module cache tag look-up

Details Distributed memory module cache tag look-up Distributed memory module cache tag look-up

2005-04-12

2005-04-12

Kim, Matthew (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S118000, C711S135000, C711S136000, C711S137000, C711S147000, C711S148000, C711S149000, C711S150000, C711S167000, C711S169000, C711S140000

Reexamination Certificate

active

06880044

ABSTRACT:
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at least one memory module by way of a point-to-point interface. The data cache and associated logic are located in one or more buffer components on each of the memory modules. The tag look-ups are performed in parallel with the memory module decodes. This improves latency for cache hits without penalizing the latency for cache misses.

REFERENCES:
patent: 5361391 (1994-11-01), Westberg
patent: 6075740 (2000-06-01), Leung
patent: 6128702 (2000-10-01), Saulsbury et al.
patent: 6216178 (2001-04-01), Stracovsky et al.
patent: 6530006 (2003-03-01), Dodd et al.
patent: 6584546 (2003-06-01), Kavipurapu
patent: 20020129215 (2002-09-01), Yoo et al.

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