Method for electrochemically processing a workpiece

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S678000, C438S637000

Reexamination Certificate

active

06867136

ABSTRACT:
The present invention relates to a process for forming a near-planar or planar layer of a conducting material, such as copper, on a surface of a workpiece using an ECMPR technique. The process preferably uses at least two separate plating solution chemistries to form a near-planar or planar copper layer on a semiconductor substrate that has features or cavities on its surface.

REFERENCES:
patent: 6176992 (2001-01-01), Talieh
patent: 6346479 (2002-02-01), Woo et al.
patent: 6482656 (2002-11-01), Lopatin
patent: 2000208443 (2000-07-01), None
patent: WO 0132362 (2001-05-01), None
Reid et al., “Factors influencing damascene feature fill using copper PVD and electroplating,”Solid State Technology, Jul. 2000, pp. 86-103.

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