Memory device with pointer structure to map logical to...

Details Memory device with pointer structure to map logical to... Memory device with pointer structure to map logical to...

2005-01-04

2005-01-04

Nguyen, T (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S203000, C711S204000, C711S205000, C711S206000

Reexamination Certificate

active

06839826

ABSTRACT:
A pointer structure on the storage unit of a non-volatile memory maintains a correspondence between the physical and logical address. The controller and storage unit transfer data on the basis of logical sector addresses with the conversion between the physical and logical addresses being performed on the storage unit. The pointer contains a correspondence between a logical sector address and the physical address of current data as well as maintaining one or more previous correspondences between the logical address and the physical addresses at which old data is stored. New and old data can be kept in parallel up to a certain point. When combined with background erase, performance is improved. In an exemplary embodiment, the pointer structure is one or more independent non-volatile sub-arrays, each with its own row decoder. Each pointer has a flag to indicate if it is active in addition to storing the current correspondence between a logical address and a physical address and one or more previous correspondences. When new data is written, it is written to an available, empty memory sector and the pointer is concurrently updated. Defective sectors can be removed from the pool of available sectors in a row redundancy scheme. A random, binary, or other search technique can be used to find the available erased sectors.

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Copy of International Search Report mailed May 30, 2003.

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