Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2001-08-16
2004-08-31
Zarneke, David A. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S260000
Reexamination Certificate
active
06784376
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor packaging, and more specifically, to a solderable injection-molded substrate for providing electrical and mechanical connection to integrated circuit dies.
BACKGROUND OF THE INVENTION
Semiconductors and other electronic and opto-electronic assemblies are fabricated in groups on a wafer. Known as “dies”, the individual devices are cut from the wafer and are then bonded to a carrier. The dies must be mechanically mounted and electrically connected to a circuit. For this purpose, many types of packaging have been developed, including “flip-chip”, ball grid array and leaded grid array among other mounting configurations. These configurations typically use a planar printed circuit etched on the substrate with bonding pads and the connections to the die are made by either wire bonding or direct solder connection to the die.
The resolution of the printed circuit is often the limiting factor controlling interconnect density. Photo-etch and other processes for developing a printed circuit on a substrate have resolution limitations and associated cost limitations that set the level of interconnect density at a level that is less than desirable for interfacing to present integrated circuit dies that may have hundreds of external connections.
As the density of circuit traces interfacing an integrated circuit die are increased, the inter-conductor spacing must typically be decreased. However, reducing inter-conductor spacing has a disadvantage that migration and shorting may occur more frequently for lowered inter-conductor spacings, thus setting another practical limit on the interconnect density.
Therefore, it would be desirable to provide a method and substrate having improved interconnect density with a low associated manufacturing cost. It would further be desirable to provide a method and substrate having reduced susceptibility to shorting and migration between conductors.
SUMMARY OF THE INVENTION
A solderable injection-molded substrate and a method for manufacturing an injection-molded substrate generate a circuit pattern within a substrate having solderable wire-bonding or solder ball attach pads. A substrate is injection molded using a tool formed in the shape of the desired circuit pattern and conductor is deposited on the substrate. An etchant resistive compound is applied to the conductor-coated substrate and conductor is removed with an etchant. The conductor that remains on the substrate is plated with a plating suitable for soldering or wire-bonding and finally, an integrated circuit die is attached via wire-bonding, solder-ball attach or a combination of attachment techniques.
REFERENCES:
patent: 4996391 (1991-02-01), Schmidt
patent: 5081520 (1992-01-01), Yoshii et al.
patent: 5371654 (1994-12-01), Beaman et al.
patent: 6392160 (2002-05-01), Andry et al.
patent: 6407930 (2002-06-01), Hsu
Huemoeller Ronald Patrick
Rusli Sukianto
Amkor Technology Inc.
Norris Jeremy
Weiss, Moy & Harris P.C.
Zarneke David A.
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