Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2002-11-14
2004-02-10
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S770000
Reexamination Certificate
active
06689646
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to the fabrication of integrated circuit (IC) devices, and more particularly, to a method for forming oxide interfaces on silicon using high-density plasma.
2. Description of the Related Art
FIG. 1
is a schematic of a stacked gate structure for a thin film transistor (prior art). The proper performance of IC devices depends, in part, on the characteristics of oxide layers within the device structure. A thin film transistor (TFT) will be used as an illustration, however, it is understood that the discussion applies to other IC devices as well. In
FIG. 1
, oxide layers form the gate insulator. Both the bulk characteristics of the gate insulator and the characteristics of the interface between the gate insulator and the silicon layer are very important for the operation of a TFT. For silicon devices, a good gate insulator film is silicon dioxide (SiO
2
), and a good method of forming a high quality SiO
2
film with excellent bulk and interface characteristics is by thermal oxidation. For a TFT, thermal oxidation involves forming a layer of silicon over a diffusion barrier and substrate and heating the resulting stack structure to form a layer of SiO
2
overlying the silicon layer. To produce an oxide layer at growth rates rapid enough to be economically practical, thermal oxidation typically is performed at temperatures between 800° C. and 1200° C. Only a limited number of substrate materials, for example, silicon, are compatible with the temperatures required for thermal oxidation.
FIG. 2
is a schematic drawing of a plasma enhanced chemical vapor deposition (PECVD) system (prior art). However, the use of substrate materials incompatible with the temperatures associated with thermal oxidation is of increasing interest. For example, improvements in liquid crystal display (LCD) technology create a need for high performance TFT driver components on transparent substrates such as glass and polymer. Unfortunately, the transparent substrates noted above are incompatible with the temperatures required for thermal oxidation. In fact, it is desirable to process these substrates at temperatures below 400° C. (hereafter referred to as low temperature). Unfortunately, the use of PECVD at low temperature results in higher impurity levels for oxide layers than are typical for thermal oxide or PECVD oxide formed at temperatures greater than 400° C. In addition, low temperature PECVD results in lower oxide deposition rates than are associated with PECVD at temperatures greater than 400° C. For typical low temperature PECVD oxide layers, characteristics such as refractive index, fixed oxide charge density, breakdown field strength, leakage current density, and interface trap density are all inferior to those for typical thermal oxide layers. For example, thermal oxide has a refractive index of 1.46, while low temperature PECVD oxide has a refractive index of less than 1.45. Modifying low temperature PECVD process parameters to increase deposition rates reduces the quality of the bulk and interface characteristics for the resulting oxide. The process in
FIG. 2
uses capacitively coupled plasma. The high frequency power is directly connected to the top electrode and capacitively coupled to the bottom electrode. The two electrodes are therefore coupled, and it is not possible to independently control energy directed to the top and bottom electrodes. Therefore, any attempt to enhance the growth rate by increasing the high frequency power leads to an increase in the sheath potential which adversely affects oxide bulk and interface properties.
There are low temperature processes currently under investigation that form an oxide layer overlying a silicon layer. Some of these processes form plasma oxide by converting a portion of the silicon layer to oxide. In some circumstances, it may be convenient to form a plasma oxide layer on a silicon layer while maintain the original thickness of the silicon layer.
It would be advantageous if a low temperature process could form oxide layers with bulk and interface characteristics superior to oxide layers formed by low temperature methods such as PECVD.
It would be advantageous if a low temperature process could form oxide layers with bulk and interface characteristics approaching those for thermal oxide.
It would be advantageous if a low temperature process could deposit oxide at rates greater than those for low temperature methods such as PECVD.
It would be advantageous if a low temperature process could form an oxide layer on a silicon layer while maintaining the original thickness of the silicon layer.
SUMMARY OF THE INVENTION
The present invention method describes a process that yields a thin film oxide, fabricated at temperatures below 400° C., having bulk and interface characteristics approaching those for thermal oxide. The process includes plasma oxidizing a sacrificial silicon layer and uses a high-density inductively coupled plasma source and chemical vapor deposition. The present invention allows the formation of integrated circuit (IC) devices, such as thin film transistors (TFTs), on transparent substrates, such as glass and polymer.
Accordingly, a method is provided for fabricating a thin film oxide. The method comprises forming a first silicon layer, applying a second silicon layer overlying the first silicon layer, oxidizing the second silicon layer at a temperature of less than 400° C. using an inductively coupled plasma source to form an oxide layer overlying the first silicon layer. The second silicon layer is plasma oxidized at a rate of up to approximately 4.4 nanometers (nm) per minute (after one minute). In some aspects of the method, the oxide layer is more than 20 nm thick and has a refractive index between approximately 1.45 and 1.47. The plasma oxide is formed by plasma oxidizing the second silicon layer at specified parameters including power density, pressure, process gas composition, and process gas flow.
In some aspects of the method, the oxide layer overlies the oxidized second silicon layer and is formed at a temperature of less than 400° C. by a high-density plasma enhanced chemical vapor deposition (HD-PECVD) process and an inductively coupled plasma source. In some aspects of the method, the oxide layer and the first silicon layer are incorporated into a TFT by forming a transparent substrate layer, overlying the substrate with a diffusion barrier, and overlying the diffusion barrier with the silicon layer. Then, transistor channel, source, and drain regions are formed in the silicon layer, the oxide layer forms a gate dielectric layer, and a gate electrode overlying the gate dielectric layer is formed. The gate dielectric layer has a fixed oxide charge density of less than 5×10
11
per square centimeter.
Additional details of the above-described method are presented below.
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patent: 5792522 (1998-08-01), Jin et al.
patent: 5858819 (1999-01-01), Miyasaka
patent: 6017779 (2000-01-01), Miyasaka
patent: 6040022 (2000-03-01), Chang et al.
patent: 6096661 (2000-08-01), Ngo et al.
patent: 6159559 (2000-12-01), Reber et al.
patent: 6235563 (2001-05-01), Oka et al.
Adachi Masahiro
Hartzell John W.
Joshi Pooran Chandra
Ono Yoshi
Nhu David
Rabdau Matthew D.
Ripma David C.
Sharp Laboratories of America Inc.
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