Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2001-06-27
2004-11-23
Kielin, Erik (Department: 2813)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S253000
Reexamination Certificate
active
06821862
ABSTRACT:
RELATED APPLICATION
This application claims the benefit of Korean Patent Application No. 00-35708, filed Jun. 27, 2000, the disclosure of which is hereby incorporated herein by reference.
FIELD OF THE INVENTION
The present invention relates generally to methods of manufacturing integrated circuit devices and integrated circuit devices manufactured using same, and, more particularly, to reducing the diffusion of impurities, such as hydrogen, into integrated circuit device layers during manufacturing.
BACKGROUND OF THE INVENTION
Ferroelectric capacitors may be used in integrated circuit memory devices. Specifically, non-volatile integrated circuit memory devices often make use of the remnant polarization (P
r
) phenomenon of a ferroelectric layer, which corresponds to the concept of a binary memory. Two materials that are commonly used to form ferroelectric layers are PZT(Pb(Zr, Ti)O
3
) and SBT(SrBi
2
Ta
2
O
9
).
A potential problem in forming a capacitor dielectric layer using a ferroelectric material is that the ferroelectric characteristic of the material used for the capacitor dielectric layer may be degraded during additional integration processes, which are performed after the formation of the ferroelectric capacitor. This potential problem is described in more detail hereinafter.
In manufacturing an integrated circuit memory device, the following processes are typically performed after the formation of a capacitor: 1) an InterLayer Dielectric (ILD) process, 2) an InterMetal Dielectric (IMD) process, and 3) a passivation process. During these processes, impurities may be generated, such as hydrogen, which can degrade a capacitor dielectric layer. The generated hydrogen may immediately infiltrate the capacitor dielectric layer during the foregoing processes or the hydrogen may gradually infiltrate the capacitor dielectric layer after the hydrogen has been introduced into an ILD layer, an IMD layer, or a passivation layer. As a result, the P
r
of the ferroelectric dielectric layer may decrease.
For example, when an ILD process is used to form a silicon oxide interlayer insulation layer after a ferroelectric capacitor is formed on a semiconductor substrate, the dielectric layer of the capacitor may be degraded. In other words, in the process of forming a silicon oxide interlayer insulation layer using, for example, a plasma enhanced chemical vapor deposition (PECVD) method, silane (SiH
4
) gas and oxygen (O
2
) gas may be used. Hydrogen is generated as a by-product of the reaction between the silane gas and the oxygen gas. The generated hydrogen may immediately diffuse into the dielectric layer of the ferroelectric capacitor and degrade the dielectric layer, or may be introduced into an interlayer insulation layer formed from the ILD process and gradually degrade the capacitor dielectric layer. As a result, the P
r
value of the capacitor dielectric layer may decrease to an extent that the capacitor dielectric layer may lose its ferroelectric characteristics. Unfortunately, a ferroelectric dielectric layer may be similarly degraded as a result of performing an IMD process for forming an intermetal insulation layer and/or performing a passivation process for forming a passivation layer.
SUMMARY OF THE INVENTION
According to embodiments of the present invention, an integrated circuit device is manufactured by exposing at least a portion of an insulation layer that comprises oxygen to a metal precursor that is reactive with oxygen so as to form a metal oxide layer on the portion of the insulation layer. The metal oxide layer may reduce the diffusion of impurities, such as hydrogen, into the insulation layer, which may degrade the electrical characteristics of the insulation layer.
Exposing the portion of the insulation layer to the metal precursor may comprise pulsing the metal precursor over the integrated circuit device for about 0.1 to 2 seconds at a flow rate of about 50 to 300 sccm, and then exposing the integrated circuit device to an inert gas for a duration of about 0.1 to 10 seconds and at a flow rate of about 50 to 300 sccm.
In accordance with further embodiments of the present invention, the integrated circuit device may be thermally treated in an oxygen atmosphere using a rapid thermal processing apparatus or a furnace type thermal processing apparatus. The thermal treatment may be performed at a temperature of about 400 to 600° C. for a duration of about 10 seconds to 10 minutes.
The metal precursor may comprise a gas selected from the following group of gases: TriMethyl Aluminum (TMA), DiMethylAluminum Hydride (DMAH), DiMethylEthylAmine Alane (DMEAA), TriIsoButylAluminum (TIBA), TriEthyl Aluminum (TEA), TaCl
5
, Ta(OC
2
H
5
)
4
, TiCl
4
, Ti(OC
2
H
5
)
4
, ZrCl
4
, HfCl
4
, Nb(OC
2
H
5
)
5
, Mg(thd)
2
, Ce(thd)
3
, and Y(thd)
3
, wherein thd is given by the following structural formula:
The insulation layer may comprise a capacitor dielectric layer and/or may comprise a material selected from the following group of materials: TiO
2
, SiO
2
, Ta
2
O
5
, Al
2
O
3
, BaTiO
3
, SrTiO
3
, (Ba, Sr)TiO
3
, Bi
4
Ti
3
O
12
, PbTiO
3
, PZT((Pb,La)(Zr,Ti)O
3
), and (SrBi
2
Ta
2
O
9
)(SBT).
A second metal oxide layer may be disposed on the insulation layer and the first metal oxide layer to further reduce the diffusion of impurities, such as hydrogen, into the insulation layer due to subsequent integration processing operations.
The second metal oxide layer may be formed by pulsing a second metal precursor over the integrated circuit device, exposing the integrated circuit device to an inert gas, pulsing oxygen gas over the integrated circuit device, and then exposing the integrated circuit device to an inert gas. In accordance with particular embodiments of the present invention, the second metal oxide layer may be denser than the first metal oxide layer.
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patent: 6509601 (2003-01-01), Lee et al.
patent: 2001/0006835 (2001-07-01), Kim et al.
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patent: 2001/0041250 (2001-11-01), Werkhoven et al.
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Merriam-Webster Collegiate Dictionary, 10th edition, p. 829.*
Kukli et al. “In situ study of atomic layer epitaxy growth of tantalum oxide thin films from Ta(OC2H5)5 and H2O” Applied Surface Science 112 (1997) pp. 236-242.*
Haukka et al. “Growth mechanisms of mixed oxides on alumina” Applied Surface Science 112 (1997) pp. 23-29.*
Notice to Submit Response (Translation Included), Korean Application No. 10-2000-0035708, Jan. 28, 2002.
Kielin Erik
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
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