Mapping a logical address to a plurality on non-logical...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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C711S209000

Reexamination Certificate

active

06782464

ABSTRACT:

TECHNICAL FIELD
This invention relates, in general, to processing within a computing environment, and in particular, to an address mapping capability that facilitates communication between entities of the computing environment.
BACKGROUND OF THE INVENTION
Processing within a computing environment necessitates the referencing of addresses of storage locations of the computing environment. These addresses may be used to perform a task, such as invoke processes or functions, store data at a particular location and/or obtain data from a location, as examples. Thus, it is imperative for an entity of the computing environment, such as an application, wishing to perform such a task to know the address associated with that task.
In some computing environments (e.g., in some single system environments), the addresses of particular storage locations are predefined, and this pre-definition is known to the entities. Thus, the entities know which addresses to reference for particular tasks. However, in other environments, the entities do not know of such a pre-definition and it is thus, more difficult to determine the appropriate addresses. This is particularly true for those systems (e.g., distributed systems) in which the addressing for the various nodes is different. For example, a particular function may be referenced by one address on one node, and yet, another address at another node.
In those types of systems, another mechanism is needed for obtaining the appropriate addresses. As one example, an address exchange is used in which the entities on the various systems exchange addresses prior to performing the task. For instance, if an application on Node A wishes to send a message to an application on Node B to invoke a function on Node B, then the application on Node A and the application on Node B communicate with one another to obtain the address for the function. After this exchange, then the application on Node A sends the application on Node B the message to invoke the function, wherein the message includes the appropriate address.
Although this type of exchange is more flexible than the pre-defining of addresses, it places an additional burden on the applications and on the computing environment. Thus, a need exists for a capability that facilitates communication between different entities of a computing environment. A further need exists for a capability that facilitates the referencing of addresses in order to perform tasks.
SUMMARY OF THE INVENTION
The shortcomings of the prior art are overcome and additional advantages are provided through the provision of a method of mapping addresses. The method includes, for instance, specifying a logical address, the logical address corresponding to a first non-logical address; and mapping the logical address to a second non-logical address, wherein the logical address corresponds to a plurality of non-logical addresses.
In a further embodiment, a method of mapping addresses is provided, which includes, for instance, receiving, by one entity of a computing environment from another entity of the computing environment, a message having a logical address, the logical address corresponding to a non-logical address usable by the one entity that is unknown to the another entity; and translating the logical address into the non-logical address usable by the one entity.
In yet a further embodiment, a method of mapping addresses is provided. The method includes, for instance, sending, from one operating system instance to another operating system instance, a message indicating a task to be performed, the message including a logical address associated with the task; determining, by a component of the another operating system instance, a non-logical address corresponding to the logical address; and using the non-logical address by the another operating system instance to facilitate execution of the task.
Advantageously, an address mapping capability is provided, which maps a logical address to a plurality of non-logical addresses. When an entity wishes to communicate with another entity and an address is to be referenced in the communication, a logical address is used. This logical address, which corresponds to a non-logical address of the sending entity, is translated by the receiving entity to another non-logical address. This other non-logical address may be the same or different than the non-logical address of the sending entity. In either case, the other non-logical address is unknown to the sending entity. Thus, communication between the entities is facilitated by not requiring the entities to know the addressing of one another.
System and computer program products corresponding to the above-summarized methods are also described and claimed herein.
Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention.


REFERENCES:
patent: 4769770 (1988-09-01), Miyadera et al.
patent: 4833603 (1989-05-01), Morganti et al.
patent: 5355461 (1994-10-01), Wakui et al.
patent: 5630087 (1997-05-01), Talluri et al.
patent: 5649141 (1997-07-01), Yamazaki
patent: 5784706 (1998-07-01), Oberlin et al.
patent: 6047332 (2000-04-01), Viswanathan et al.
patent: 6070189 (2000-05-01), Bender et al.
patent: 6111894 (2000-08-01), Bender et al.
patent: 2002/0034178 (2002-03-01), Schmidt et al.
patent: 91345447 (1991-12-01), None
K. Li. “Shared Virtual Memory on Loosely Coupled Multiprocessors”. PhD Thesis, Department of Computer Science, Yale University, Sep. 1986.
W. Yu. C. Amza, A.L. Cox, S. Dwarkadas, P. Keleher, H. Lu, R. Rajamony and W. Zwaenepoel. “TreadMarks: Shared Memory Computing on Networks of Workstations”. IEEE Computer, pp. 18-28, Feb. 1996.
U. Ramachandran, Y.A. Khalidi: An Implementation of Distributed Shared Memory, Software—Practice and Experience 21(5):443-464 (1991).

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