Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2002-04-16
2004-11-02
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06813753
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of integrated circuit design and more particularly relates to determining the characteristics of an integrated circuit component.
BACKGROUND
Designers utilize computer aided engineering (CAE) systems when creating integrated circuits. CAE systems, in general, permit a designer to electronically construct and test a model circuit, without having to physically assemble the test circuit. The designer selects the type of component (also referred to as cells, devices, etc.) from a system library. The designer then places and connects the component with other components within the model circuit. The designer may then execute tests that simulate the operational characteristics of the model circuit The designer may change the type of components used, the placement of the components, and the interconnection routing of the circuit in an attempt to optimize the operational characteristics of the integrated circuit. Thus, by using CAE, the designer may insure that the design criteria for the integrated circuit is met before the integrated circuit is physically manufactured.
The CAE's system library contains a list of components that may be selected by the designer. The library may contain a multitude of component types, for example, the library may contain inverters, transistors, multiplexers, latches, and flip-flops, among others. The library may also contain each component's characteristics or parameter information, for example, the operating voltage, resistance, capacitance, threshold voltage, and timing delay, among others. Additionally, the library may contain several components of a single type, each having different parameters. For example, the library may contain several inverters, each having a different timing delay characteristic, among others Thus, a designer may choose from the library and substitute a component having different parameters to optimize the integrated circuit. The library may be updated by adding new components or changing the parameters of existing components.
One challenge related to creating or updating the library is determining the characteristics for a specific component. Prior art methods for determining a component's characteristics are very time consuming. In particular, prior art methods for determining the timing delay characteristics of a component use time-intensive iterative approaches. Furthermore, the iterative approaches must be completed for each component m the library because adequate scaling methods do not exist. For example, the delay curve of a component is usually non-linear due to the component's dependence on the edge ramp time of an input signal and the capacitive load. Because prior art scaling methods for overcoming the non-linearity of the delay curve do not exist an iterative process must be used to characterize the timing delay of each component for various input edge ramp times and capacitive loads.
A need exists, therefore, for a method that simplifies the determination of a component's characteristics. In particular, a need exists for a method of characterizing a component having a reduced number of iterative steps. Additionally, a need exists for a method for determining the characteristics of components by scaling a pre-characterized component, without using an iterative process on each component.
SUMMARY
One embodiment of the present invention relates to a method for characterizing a timing delay curve of a circuit component, wherein the timing delay curve has a first region and a second region. The method includes determining a first delay equation representing the first region of the delay curve, determining a second delay equation representing the second region of the delay curve, and determining a corner capacitance representing a transition point from the first region to the second region.
Another embodiment of the present invention relates to a method for characterizing a timing delay curve for each of a plurality of circuit components. The method includes pre-characterizing the timing delay curve of a first circuit component, and scaling the pre-characterized timing delay curve of the first circuit component to obtain a characterized timing delay curve for another circuit component. The timing delay curve of a first circuit component step may be pre-characterized by determining a corner capacitance for the first circuit component, and determining the gradient of the second region of the first circuit component's delay curve.
Yet another embodiment of the present invention relates to a method for characterizing a plurality of components within a computer aided engineering system library. The method includes pre-characterizing a base component, determining a scaling factor, and scaling the pre-characterized base component to characterize another of the plurality of components. Pre-characterizing the base component may include determining a corner capacitance representing a transition point between a first region and a second region of a delay curve for the base component, and determining the shape of the first region and the second region of the delay curve of the base component. Determining the scaling factor may include determining the gradients for the second region of the delay curves the base component and for another component.
An embodiment of the present invention relates to a circuit for modeling the characteristics of a component. The circuit includes a resistance for modeling an output transistor of the component, a capacitance for modeling the output load of the component, a switch operable to connect the resistance to the capacitance, and an input signal generator providing an input signal to the circuit. The resistance of the model circuit may be variable with respect to the input signal and to time.
REFERENCES:
patent: 4924430 (1990-05-01), Zasio et al.
patent: 5475605 (1995-12-01), Lin
patent: 5654898 (1997-08-01), Roetcisoender et al.
patent: 6023567 (2000-02-01), Osler et al.
patent: 6028995 (2000-02-01), Jetton et al.
patent: 6272668 (2001-08-01), Teene
patent: 6301693 (2001-10-01), Naylor et al.
patent: 6701497 (2004-03-01), Ohkubo
Do Thuan
Thorp Reed & Armstrong LLP
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