Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-08-29
2004-11-09
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S309000
Reexamination Certificate
active
06815753
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a semiconductor device and fabrication thereof and, more particularly, to a semiconductor capacitor structure and fabrication thereof.
BACKGROUND OF THE INVENTION
During semiconductor fabrication of memory devices, to save space, the capacitor of a storage cell must reduce in size and yet maintain adequate capacitance to retain a sufficient charge, such as during Dynamic Random Access Memory (DRAM) operation. There are several approaches to the capacitor design, for example trench capacitors formed in the substrate of a wafer or a stacked capacitor formed above the wafer substrate, to name two.
Regardless of the design chosen, the size of the capacitor must be reduced and yet maintain sufficient capacitance as mentioned previously. Two of the main contributors to capacitance are the surface area of the capacitor plates and the dielectric quality of the insulator separating the capacitor plates. Major engineering efforts have gone into improvements in both areas.
Once the capacitor design is chosen, another factor should be considered and that is the physical connection between the capacitor plate and the underlying conductor (i.e., a conductive plug between the capacitor plate and a source/drain of an access transistor or the source/drain of the access transistor itself). It is desirable that the physical connection between the capacitor plate and the underlying conductor consist of as low resistance as possible and thus provide for low “time at temperature” (DT) flow during fabrication processing.
A significant focus of the present invention is the development of a capacitor having a high surface area within a confined area that possesses a low DT flow. Thus, the present invention comprises a capacitor structure having a high surface area within a confined area that possesses a low DT flow and a method to fabricate same, which will become apparent to those skilled in the art from the following disclosure.
SUMMARY OF THE INVENTION
Exemplary embodiments of the present invention include a capacitor container structure and a method to fabricate same. A capacitor container structure comprises a semiconductor capacitor structure having sidewalls of conductive hemispherical grained material, a base of metal silicide material, and a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material.
A semiconductor capacitor structure is fabricated by forming a base of metal silicide material along the sidewalls of an insulative material having an opening therein, forming sidewalls of conductive hemispherical grained material on the metal suicide material, and forming a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material.
REFERENCES:
patent: 6004857 (1999-12-01), Hsiao et al.
patent: 6188097 (2001-02-01), Derderian et al.
patent: 6319769 (2001-11-01), Cho
Micro)n Technology, Inc.
Nguyen Cuong
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