Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1998-10-13
2004-08-31
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S166000, C438S308000
Reexamination Certificate
active
06784034
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a thin film transistor, and more particularly, to a method of fabricating a thin film transistor by crystallizing an amorphous silicon layer into a polysilicon layer, thereby providing a polysilicon thin film transistor.
2. Discussion of the Related Art
Recently, polysilicon (poly-Si) TFTs(Thin Film Transistors) have been actively investigated due to their potential in high mobility and current driving ability. They are usually applied to three-dimensional integrated circuits and active matrix liquid crystal displays (AMLCD). A low temperature process and short process times are essential for reducing the manufacturing cost. The use of relatively inexpensive glass substrates further reduces cost. However, most of the technologies adopt high temperature process for the crystallization of amorphous silicon. In poly-Si TFTs, the crystalline quality of silicon is of great importance since the integrated circuits are built with silicon film.
The effect of a small presence of metal impurities on the crystallization of amorphous silicon film was researched by Mayer et al. Recently, one report has claimed that Ni can substantially decrease the crystallization temperature to as low as 480° C. It is proven that the nucleation and growth of crystalline silicon are mediated by the formation of nickel silicide (NiSi
2
) and the crystallization velocity is limited by the diffusion of NiSi
2
in MIC(MIC: Metal Induced Crystallization) method. MIC was further improved to MILC (Metal Induced Lateral Crystallization) where the crystalline seed (NiSi
2
) propagates into the metal-free area by thermal diffusion, thus obtaining large-grained poly-Si films with a small metal contamination.
FIG. 1A
to
FIG. 1B
show a first example of fabricating a thin film transistor according to the related art. The following first example of the related art is from U.S. patent application Ser. No. 08/833,131, which is owned by the same assignee as the present application and is hereby incorporated by reference, and “A Novel Self-Aligned Polycrystaline Silicon Thin-Film Transistor Using Silicide Layers” by Jai Il Ryu et. al., IEEE Electron Device Letters, Vol. 18, No. 6, June 1997.
Referring to
FIG. 1A
, a semiconductor layer
11
and a gate insulating film
13
are formed on an insulating substrate
10
in succession. Another semiconductor layer is formed on the gate insulating film
13
. The semiconductor layer on the gate insulating film
13
and the gate insulating film
13
are patterned together. Then, ion showering is performed to form heavily doped semiconductor layers
16
in the semiconductor layer on the gate insulating film
13
and the exposed semiconductor layer
11
on both sides of the gate insulating film
13
.
Referring to
FIG. 1B
, nickel having a thickness of 30 Å is RF-sputtered on the heavily doped semiconductor layer
16
to form a nickel silicide layer
12
over the gate insulating film
13
and both sides of the gate insulating film
13
. In the sputtering method, a nickel target of 6N purity is preheated for 20 minutes at a temperature of 200° C. under an initial vacuum of 3×10−6 Torr. The sputtering method is performed at 75 W RF power for 5 seconds. Then, the substance is annealed in an argon ambient for one hour at a substrate temperature of 260° C. to form nickel silicide layers
12
. Residual nickel that did not react with silicon is removed by a mixture of HNO3 and HCl with a ratio of 1:5.
In the first example of the related art, as shown in
FIG. 2
, the semiconductor layer
11
is used as an active layer of the thin film transistor, and the semiconductor layer
11
is formed by crystallizing amorphous silicon layer
11
L into a polysilicon layer through laser annealing. Generally, laser crystallization is performed by carrying out laser scanning on the amorphous silicon layer
11
L on the substrate
10
for a long time, thereby crystallizing amorphous silicon layer into the polysilicon layer. As a result, the first example of the related art has the disadvantage of requiring a long process time. In addition, since this method gives a non-uniform crystallization, it is unsuitable for fabricating a plurality of transistors having uniform characteristics on the substrate.
FIG. 3A
to
FIG. 3D
show a second example of fabricating a thin film transistor according to the related art. The following second example of the related art shows a method of fabricating a thin film transistor using the MILC technique.
Referring to
FIG. 3A
, an amorphous silicon layer is deposited on a substrate
30
, and then the amorphous silicon layer is etched to form an active layer
31
.
Referring to
FIG. 3B
, an oxide layer and an Mo layer are deposited on the active layer
31
and the substrate
30
in succession, and then, the Mo layer and the oxide layer are etched to form gate electrode
33
and gate insulating layer
32
on the active layer
31
.
Referring to
FIG. 3C
, impurities having a first conductivity type are doped in the active layer formed by the amorphous silicon layer to form a source region
31
S and a drain region
31
D in the active layer
31
. Then, a nickel thin film
37
is deposited on the exposed and doped active layer.
Referring to
FIG. 3D
, a thermal treatment is performed on the resultant substrate comprising nickel thin film
37
at a temperature of about 500° C., to crystallize the amorphous silicon layer used as the active layer
31
into a polysilicon layer
31
′, thereby providing a polysilicon thin film transistor.
When performing the thermal treatment, a portion of the amorphous silicon layer that contacts the nickel thin film becomes nickel silicide
37
′. The nickel silicide is used as a nucleus for crystallizing amorphous silicon into polysilicon. Silicon portions contacting nickel thin film
31
, for example, the source region
31
S and the drain region
31
D, are crystallized by MIC, and a nickel-free region, for example, a channel region
31
C, is crystallized by MILC. Here, a small amount of the nickel or nickel silicide contaminates the center of the channel region.
Therefore, the second example of the related art has the disadvantages of requiring long crystallization time and decreasing the characteristics of the thin film transistor due to contamination of the crystallized silicon layer by metal impurities, such as, nickel silicide.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for fabricating a thin film transistor that substantially obviates one or more of the problem due to limitations and disadvantages of the related art.
An object of the present invention is to provide a thin film transistor with high electric field mobility.
Another object of the present invention is to provide a thin film transistor with high on/off ratio with low leakage current.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described, a method for fabricating a thin film transistor comprises the steps of forming an amorphous silicon layer as an active layer on a substrate; forming a gate insulating layer and a gate electrode on the amorphous silicon layer; doping impurities of first conductive type in exposed portions of the amorphous silicon layer; forming metal layers on the doped portions of the amorphous silicon layer; crystallizing the amorphous silicon layer by performing heat treatment and applying electric field in the resultant substrate.
In another aspect of the present invention, a method for fabricating thin film transistor
Fourson George
LG. Philips LCD Co. Ltd.
McKenna Long & Aldridge LLP
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