Semiconductor device manufacturing: process – Electron emitter manufacture
Reexamination Certificate
2001-10-31
2004-10-12
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Electron emitter manufacture
C257S097000
Reexamination Certificate
active
06803243
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to ohmic contacts to semiconductor materials. In particular, the invention relates to methods of forming ohmic contacts to devices that include a plurality of semiconductor materials.
BACKGROUND OF THE INVENTION
In the microelectronics context, circuits are made from the sequential connection of semiconductor devices. Generally speaking, semiconductor devices are operated by, and are used to control, the flow of electric current within specific circuits to accomplish particular tasks. To connect semiconductor devices in a circuit, appropriate contacts must be made to the semiconductor devices. Because of their high conductivity and other chemical properties, the most useful and convenient materials for making contacts to such devices are metals.
Metal contacts between semiconductor devices and circuits should interfere either minimally or preferably not at all with the operation of the device or the circuit. Furthermore, the metal contact must be physically and chemically compatible with the semiconductor material to which it is made or attached. The types of contact that exhibit these desired characteristics are known as “ohmic contacts.”
An ohmic contact is usually defined as a metal-semiconductor contact that has a negligible contact resistance relative to the bulk or spreading resistance of the semiconductor,
Sze, Physics of Semiconductor Devices
, Second Edition, 1981, page 304. As further stated therein, an appropriate ohmic contact will not significantly change the performance of the device to which it is attached, and it can supply any required current with a voltage drop that is appropriately small compared with the drop across the active region of the device.
Ohmic contacts and methods of producing ohmic contacts are known in the art. For example, U.S. Pat. Nos. 5,409,859 and 5,323,022 to Glass et al. (“the Glass patents”), the entire contents of which are incorporated herein by reference, discuss an ohmic contact structure formed of platinum and p-type silicon carbide and a method of making the ohmic structures. Although ohmic contacts and methods of making them are known, the known methods for producing ohmic contacts, and especially those produced using a silicon carbide substrate, are difficult even when properly conducted.
The problems associated with obtaining ohmic contacts are myriad and cumulative. Limited electrical conductivity of the semiconductor due to low hole or electron concentrations may hinder or even prevent the formation of an ohmic contact. Likewise, poor hole or electron mobility within the semiconductor may hinder or even prevent the formation of an ohmic contact. As discussed in the Glass patents, work function differences between the contact metal and semiconductor may give rise to a potential barrier resulting in a contact exhibiting rectifying (non-ohmic) current flow versus applied voltage. Even between two identical semiconductor materials in intimate contact with greatly differing electron-hole concentrations, a potential barrier (built-in potential) may exist, leading to a rectifying rather than ohmic contact. In the Glass patents, these problems were addressed by inserting a distinct p-type doped SiC layer between the p-type SiC substrate and the contact metal.
More difficult problems are encountered when forming ohmic contacts for newer generation gallium and indium based semiconductor devices. The formation of an ohmic contact between a semiconductor and a metal requires the correct alloying of the semiconductor and the contact metal at their interface. Selectively increasing the hole/electron concentration at the semiconductor surface where the ohmic contact metal is deposited is known as an effective means for enhancing the contact process to achieve an ohmic contact. This process is typically achieved through ion implantation, which is well recognized as a selective doping technique in silicon and silicon carbide technologies. However, in the case of silicon carbide, ion implantation is usually performed at elevated temperatures (typically >600° C.) in order to minimize damage to the silicon carbide crystal lattice. “Activating” the implanted atoms to achieve the desired high carrier concentrations often requires anneal temperatures in excess of 1600° C., often in a silicon over-pressure. The equipment required for this ion implantation technique is specialized and expensive.
After the high temperature ion implant and subsequent anneal, the contact metal is deposited on the implanted substrate surface and annealed at temperatures in excess of 900° C. This method of forming contacts on semiconductor devices that incorporate gallium nitride or indium gallium nitride is not feasible because these compounds disassociate at elevated temperatures.
One theoretical answer to this problem would be to form an ohmic contact on the substrate prior to growing the delicate epitaxial layers (e.g. gallium nitride layers) necessary to complete the semiconductor device. This approach is undesirable, however, because it inserts an undesired contaminant, the contact metal, into the epitaxial growth system. The contaminant metal can affect epitaxial growth by interfering with lattice growth, doping, rate of reaction or all of these factors. In addition, metal impurities can degrade the optical and electrical properties of the epitaxial layers.
Similarly, many semiconductor devices such as metal-oxide-semiconductor field-effect transistors (“MOSFETS”) require a layer of a semiconductor oxide (e.g. silicon dioxide). The high temperatures associated with traditional ion implantation techniques and implant or contact metal annealing processes place high stress on oxide layers, which can damage oxide layers, the semiconductor-oxide interface and the device itself. Alternatively, forming the ohmic contact prior to creating the oxide layer is not practical because the oxidizing environment utilized to form the oxide layers has adverse effects on the ohmic contact.
In parent application Ser. No. 09/787,189, it has been discovered that an ohmic contact can be successfully formed on silicon carbide by increasing the carrier concentration adjacent the surface on which the contact is to be formed, annealing the silicon carbide, adding the metal contact, and then annealing the contact, but at a temperature low enough to avoid degrading any of the temperature-sensitive epitaxial layers (e.g. certain Group III nitrides) on the silicon carbide.
Nevertheless, such technique still requires the second anneal, with its potential for affecting the epitaxial layers.
Accordingly, a need exists for a practical and economical method for forming an ohmic contact for use in conjunction with a semiconductor device that does not exhibit the manufacturing problems previously discussed. The need also exists for a type of a semiconductor device that incorporates an ohmic contact but is economic to manufacture.
OBJECT AND SUMMARY OF THE INVENTION
It is an object of the invention is to provide a semiconductor device that incorporates an ohmic contact.
It is a further object of the invention to provide a semiconductor device comprising silicon carbide and an ohmic contact.
It is a further object of the invention to provide a semiconductor device that incorporates an ohmic contact that is economic to manufacture.
It is a further object of the invention to provide a method for forming a semiconductor device that can incorporate an ohmic contact formed from an increased choice of metals.
The invention meets these objects with a method for forming a metal-semiconductor ohmic contact for a semiconductor device. The method comprises implanting a selected dopant material into a surface of a semiconductor substrate having an initial conductivity type. The implanted dopant provides the same conductivity type as the semiconductor substrate. The dopant implantation is followed by annealing the implanted semiconductor substrate at a temperature and for a time sufficient to activate the implanted dopant atoms and increase the effective carr
Slater, Jr. David B.
Suvorov Alexander
Cree Inc.
Nelms David
Summa & Allan P.A.
Vu David
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