Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1995-03-27
2004-10-26
Pert, Evan (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S163000
Reexamination Certificate
active
06808965
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a thin-film semiconductor device comprising a non-single-crystal semiconductor film, a method of fabricating such a thin-film semiconductor device, and a display system in which the thin-film semiconductor device is used.
BACKGROUND OF THE INVENTION
Thin-film semiconductor devices formed using non-single-crystal semiconductor films such as polycrystalline and amorphous semiconductor films are used in the display portions and peripheral circuitry of active matrix liquid crystal display devices, image sensors and SRAM devices. “Thin film semiconductor device” refers to a semiconductor film, a thin-film transistor (TFT), or a CMOS type of TFT having a p-channel TFT and an n-channel TFT. “Thin-film semiconductor device” and “TFT” are used interchangeably in this document.
Thin-film semiconductor devices are required to operate at high speeds when used in peripheral circuitry such as a liquid crystal display device. When the operational speed is sufficiently high, switching devices of the display portion and all the peripheral circuitry such as shift registers and analog switches can be integrated onto the liquid crystal substrate using the suitable thin-film semiconductor devices.
If the speed of the thin-film semiconductor devices were to be increased, the range of applications would be much wider than in the prior art. Prior art applications of the thin-film semiconductor devices are limited to liquid crystal display devices. It has been very difficult to extend the application of thin-film semiconductor devices to digital and analog circuits where single-crystal MOSFETs are used. This is because the thin-film semiconductor device has a smaller carrier mobility than the carrier mobility of a single-crystal MOSFET. Thus, the speed of the thin-film semiconductor device is slower than the speed of the single crystal MOSFET. However, if the thin-film semiconductor device operates at a speed comparable to that of a single-crystal MOSFET, the thin-film semiconductor device may be used in digital and analog circuits where only single-crystal MOSFETs are used in the prior art.
The thin-film semiconductor device differs from a single-crystal MOSFET in that it is formed on an insulating substance. This means that it is not affected by the problems experienced by the single-crystal MOSFET. Problems such as noise transmitted through the substrate and latch-up caused by current flowing through the substrate are examples. Therefore, increasing the speed of a thin-film semiconductor device is a technical objective.
In order to increase the speed of the thin-film semiconductor device, the following problems described must be solved. An example of a thin-film semiconductor device is shown in FIG.
56
A and an equivalent circuit diagram of this thin-film semiconductor device is shown in FIG.
56
B. In
FIG. 56B
, Rc
1
and Rc
2
are contact resistances of a contact portion
412
between wiring
408
and a source portion
404
and a contact portion
414
between wiring
410
and a drain portion
406
. Rs is the source resistance of the source portion
404
, Rch is the channel resistance of a channel portion
402
, and Rd is the drain resistance of the drain portion
406
.
In order to increase the speed of this thin-film semiconductor device, it is first necessary to reduce the total value of the serially connected resistances Rc
1
, Rs, Rch, Rd, and Rc
2
when the transistor is ON. If the total resistance when the transistor is ON is denoted by Ron, Ron is the sum of the on-state channel resistance Rch(on) and the overall parasitic resistance Rp of the rest of the components. In other words:
&AutoLeftMatch;
Ron
=
Rch
(
on
)
+
Rp
=
Rch
(
on
)
+
(
Rc1
+
Rs
+
Rd
+
Rc2
)
Therefore, in order to achieve a faster thin-film semiconductor device, both the on-state channel resistance Rch(on) and the overall parasitic resistance Rp must be reduced. In order to reduce Rch(on), it is necessary to find new methods to fabricate the semiconductor films which form the thin-film semiconductor device. More specifically, the carrier mobility of the semiconductor films must be increased and the channel portion
402
must be shortened.
The resistances Rs and Rd may be reduced by either increasing the impurity concentration of the source portion and the drain portion or improving the quality of the semiconductor films forming the source and drain portions. To reduce Rc
1
and Rc
2
, barrier metal can be placed at the contact portions
412
and
414
. However, it is more effective to simplify the fabrication process by increasing the impurity concentration of the source and drain portions rather than using barrier metal.
The carrier mobility of the semiconductor films are increased by forming the thin-film semiconductor device using polycrystalline silicon (polysilicon). A polycrystalline silicon thin-film semiconductor device generally has carrier mobility of at least approximately 10 cm
2
/V.s, which is far higher than that of an amorphous silicon thin-film semiconductor device.
Three fabrication methods are known in the prior art for fabricating a polycrystalline silicon thin-film semiconductor device of this type, as described below. In the first fabrication method, a polycrystalline silicon film is first deposited by a low-pressure chemical vapor deposition (LPCVD) method at a deposition temperature of approximately 600° C. or more. The size of the regions (islands) of the polycrystalline silicon ranges approximately from 20 nm to 80 nm. The polycrystalline silicon film surface is then thermally oxidized to form the semiconductor layer and gate insulation layer of the thin-film semiconductor device. The boundary surface roughness (center line average height, Ra) between the gate insulation film and gate electrode is at least approximately 3.1 nm. One example of an n-channel type thin-film transistor fabricated by this method has a carrier mobility of approximately 10 cm
2
/V.s to 20 cm
2
/V.s. The average grain area of the semiconductor film is approximately 4,000 to 6,000 nm
2
.
In the second fabrication method, an amorphous silicon film is first formed by plasma-enhanced CVD (PECVD). The amorphous silicon film is then annealed in a nitrogen atmosphere at the temperature of 600° C. from about 20 hours to 80 hours. This annealing process converts the amorphous silicon film into a polycrystalline silicon film known as solid-phase crystallization method. The surface of this polycrystalline silicon film is thermally oxidized to form a semiconductor layer and gate insulation layer of the thin-film semiconductor device. After the thin-film semiconductor device is structured, a hydrogen plasma is applied. In this case, an n-channel type thin-film transistor has the carrier mobility of approximately 150 cm
2
/V.s. See S. Takenaka, et al., Jpn. J. Appl. Phys. 29, L2380 (1990).
In the third fabrication method, a polycrystalline silicon film is first deposited by LPCVD at a deposition temperature of 610° C. Si
+
is implanted into the polycrystalline silicon film at a dose of approximately 1.5×10
15
cm
−2
, which converts the polycrystalline silicon film into an amorphous film. The film is then annealed at 600° C. in a nitrogen atmosphere from tens to several hundreds of hours, so that the amorphous silicon is recrystallized into a polycrystalline silicon film. The surface of this polycrystalline silicon film is then thermally oxidized to form a semiconductor layer and gate insulation layer of the thin-film semiconductor device. After the basic structure of the thin-film semiconductor device is completed, a hydrogenated silicon nitride (p-Si N:H) film is deposited by PECVD over the device, and then the device is annealed in a furnace at 400° C. to hydrogenate the device. In this case, an n-channel type thin-film transistor has the carrier mobility of approximately 100 cm
2
/V.s. See T. Noguchi, et al., J. Electrochemical Soc., 134, page 1771 (1987).
The three fabrication methods described above have inherent problems. The second fabrication
Matsueda Yojiro
Miyasaka Mitsutoshi
Takenaka Satoshi
Oliff & Berridge PLC.
Pert Evan
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