Dopant barrier for doped glass in memory devices

Details Dopant barrier for doped glass in memory devices Dopant barrier for doped glass in memory devices

2002-08-29

2004-12-21

Nhu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S335000

Reexamination Certificate

active

06833575

ABSTRACT:

FIELD
The present invention relates generally to integrated circuits, and in particular, to dielectric structures in semiconductor devices.
BACKGROUND
Semiconductor devices reside in many electrical products to operate as resistors, capacitors, transistors, memory cells, and other components. A typical semiconductor device has many surface structures formed above a substrate and many active regions formed within the substrate. The surface structures and the active regions act together to form the function of the semiconductor device.
A dielectric layer is usually blanketed over the surface structures and the substrate to insulate them from other circuit layers within the semiconductor device. Glass is usually the material for this kind of dielectric layer.
During manufacturing, the glass layer (dielectric layer) is first deposited. Next, a reflow (melting) process is performed to flatten the surface of the glass layer. Today, the glass is usually doped with materials such as boron and phosphorous (dopants) to reduce the temperature of the reflow process. Thus, a doped glass has one or more dopant materials. The dopant in the doped glass, however, tends to diffuse outward and migrate to the surface structures and the substrate. This outward diffusion may change the electrical properties of the surface structures, the active regions in the substrate, the substrate itself, and hence, the performance of the device.
Most devices now have a barrier layer sandwiched between the doped glass layer and the surface structures to prevent the migration of the dopant from the doped glass layer to the surface structures and the substrate.
Silicon nitride has been suggested as the material for the barrier layer. However, the device formed by the surface structures and the active regions may suffer from underalloy due to hydrogen blocking properties. Static retention time may decrease when silicon nitride is used on a silicon substrate. This may be caused by stress, interface build up, or fixed charge.
Further, today, with increasing aspect ratio (depth to width ratio) of the gaps between the surface structures (for example, narrower gaps), the barrier layer is limited to a certain layer thickness in these gaps. With this layer thickness limitation, silicon nitride and other tetraethooxysilane (TEOS) materials may not be thick enough to prevent the outward diffusion of the dopant in the doped glass.
Thus, there is a need for an alternative barrier layer.
SUMMARY OF THE INVENTION
The present invention provides structures and methods for an improved dopant barrier layer for doped glass.
One aspect offers a semiconductor device including a substrate with a surface structure formed over it. An alumina layer is formed on and conforming to the surface structure and the substrate. A doped glass layer is formed over the alumina layer. The semiconductor device further includes an insulating layer formed between doped glass layer and the surface structure and the substrate.
Another aspect provides a method of forming a device. The method includes forming an alumina layer on multiple surface structures and a substrate of the memory device. The method also includes covering the alumina layer with a doped glass layer. The method further includes planarizing the doped glass layer.


REFERENCES:
patent: 4956313 (1990-09-01), Cote et al.
patent: 5225372 (1993-07-01), Savkar et al.
patent: 5262354 (1993-11-01), Cote et al.
patent: 5915175 (1999-06-01), Wise
patent: 6156630 (2000-12-01), Iyer
patent: 6204172 (2001-03-01), Marsh
patent: 6387726 (2002-05-01), Verlinden et al.
patent: 6531730 (2003-03-01), Sandhu et al.
patent: 6579796 (2003-06-01), Ying et al.
patent: 6602117 (2003-08-01), Chopra et al.
patent: 2003/0045082 (2003-03-01), Eldridge et al.

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