Method of forming nitrogen enriched gate dielectric with low...

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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C438S768000, C438S783000, C257S405000

Reexamination Certificate

active

06821868

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to methods of forming gate dielectric structures, and more particularly to methods of forming nitrogen enriched gate dielectric structures.
BACKGROUND OF THE INVENTION
As circuit designs become more complex and increased processing speeds are demanded, it is becoming increasingly more important and necessary to be able to provide larger numbers of transistors on an integrated circuit (IC) chip without increasing the overall size of the IC chip. One technique for increasing circuit density is to scale down the size of each individual MOSFET device on the IC chip. The performance of the MOSFET is inversely proportional to the gate oxide thickness. Efforts to enhance performance, therefore, have driven gate oxide thicknesses down below 14 Angstroms (Å). Scaling of the gate oxides to such thicknesses, however, leads to high tunneling current and boron penetration.
An alternative approach to extreme scaling of oxide thicknesses that improves device performance is the incorporation of nitrogen in the gate oxide. Gate oxide nitridation increases the dielectric constant of the gate dielectric over conventional silicon oxide, thereby reducing the effective oxide thickness while reducing gate leakage current and increasing boron penetration immunity. Several prior art nitridation processes are described in U.S. Pat. No. 5,596,218 to Soleimani et al., the entirety of which is hereby incorporated by reference herein, including nitridation using NH
3
, N
2
O oxidation and N
2
implantation.
One method of incorporating nitrogen into the gate oxide layer is through direct implantation of nitrogen in a plasma treatment process. This process can yield high doses of nitrogen at a desired, controlled depth in the silicon oxide layer, but the process tends to damage the silicon oxide layer, resulting in low carrier mobility and low driving current. Therefore, there remains a need for a new method of incorporating nitrogen into a gate oxide without adversely affecting device performance. Still further, there remains a need for a new method of implanting nitrogen into a gate oxide while reducing or eliminating damage to the oxide layer.
SUMMARY OF THE INVENTION
A method of forming a gate dielectric includes the steps of forming a gate oxide layer on a substrate, forming a buffer layer over the gate oxide layer and incorporating nitrogen into the gate oxide layer through the buffer layer. A semiconductor device having a gate structure is also provided. The gate structure includes a nitrogen enriched gate oxide layer formed on a substrate, a silicon nitride or poly-silicon buffer layer formed on the gate oxide layer and a gate electrode formed over the buffer layer.
The method provides a nitrogen enriched gate dielectric structure without directly subjecting the gate oxide to damage associated with nitridation treatment. Low leakage current and high driving current devices can thereby be fabricated including gate dielectrics having a low effective oxide thickness. The fabrication method and semiconductor structure are particularly suited for 0.15 &mgr;m and smaller technology modes.
The above and other features of the present invention will be better understood from the following detailed description of the preferred embodiments of the invention that is provided in connection with the accompanying drawings.


REFERENCES:
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patent: 5596218 (1997-01-01), Soleimani et al.
patent: 5972804 (1999-10-01), Tobin et al.
patent: 6013553 (2000-01-01), Wallace et al.
patent: 6020243 (2000-02-01), Wallace et al.
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patent: 6207489 (2001-03-01), Nam et al.
patent: 6291866 (2001-09-01), Wallace et al.
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patent: 6297173 (2001-10-01), Tobin et al.
patent: 6362085 (2002-03-01), Yu et al.
patent: 6566281 (2003-05-01), Buchanan et al.
patent: 6610615 (2003-08-01), McFadden et al.
patent: 6649538 (2003-11-01), Cheng et al.
patent: 6653192 (2003-11-01), Ryoo

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