Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2000-09-26
2004-12-21
Chauhan, Ulka J. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S536000, C345S559000, C345S629000, C702S186000, C386S349000, C380S201000
Reexamination Certificate
active
06833833
ABSTRACT:
FIELD
The present invention is directed to a computer system having benchmark testing of the video signal and, more particularly, to a computer system having a feedback path for benchmark testing of the video signal while preventing illegal copying.
BACKGROUND
Computer systems are now in use which use benchmark programs to analyze the performance of the graphics function in the graphics controller. Thus, these benchmarks measure the speed and accuracy of the generated graphics on a three-dimensional basis. Such a system contains elements shown in FIG.
1
. Computer system
10
includes a central processing unit
12
and a memory
14
which are interconnected. It also includes a graphics controller
16
which generates and controls the graphics which are displayed in monitor
18
. The device also includes a frame buffer
20
which receives the graphics signal before display on the monitor
18
. The frame buffer
20
is also connected to the processor
12
so that the graphics signal may be measured by the processor
12
and a programmed benchmarked system can be used to determine the speed and accuracy of the graphics signal.
In addition to the traditional graphics information to be displayed, computers also now have the ability of displaying video signals. This may be a video signal stored in memory, it may be a video signal which is received over an internet connection and stored in memory for later play or it may be a video signal received from a DVD ROM. Such signals whether played directly or stored in the memory for later play are handled differently than the graphics signals. An overlay block
22
is provided within the graphics controller
16
to receive and combine both the graphics and video signals. However, the video signal is not directly accessible by the processor
12
and, accordingly, it is not possible to perform a benchmark testing operation on the video signal. This means that it is not possible for the processor
12
to adjust the video signal to enhance its displayed appearance. It also does not provide a manner of testing the functionality of the system and so compare it to other systems.
The overlay block
22
reads video image data from the memory
14
, scales the image and color converts the data for presentation to the digital-to-analog converter. However, this is no feedback path to the memory
14
or to the processor
12
from the overlay block
22
. Thus, the overlay image data cannot be observed except on the monitor
18
.
The main reason that this signal is not included in a feedback path is to make it more difficult to illegally copy the video signal. For example, if the video material is taken from a DVD ROM, the original provider of the ROM does not wish the signal to be available for illegal duplication. If the video signal were fed back to the processor
12
it would more likely be copied. By keeping the video signal hidden, illegal copying is extremely difficult. Unfortunately, it also makes it extremely difficult to perform benchmark testing to measure the quality of the video signal.
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patent: 6137952 (2000-10-01), Hogan
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Chauhan Ulka J.
Intel Corporation
Schwegman Lundberg Woessner & Kluth P.A.
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