Diffusion barrier layer for semiconductor wafer fabrication

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Reexamination Certificate

active

06746952

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of semiconductor wafer fabrication, and more particularly to barrier layers to restrict diffusion of materials.
BACKGROUND OF THE INVENTION
Integrated circuits are interconnected networks of resistors, transistors and other electrical components that are generally formed on a silicon substrate or wafer with conductive, insulative and semiconductive materials. Fabricating integrated circuits involves forming active device regions or components at a number of levels and different locations. The various components are then wired or interconnected together to form a memory or other electric circuit. To connect a conductive line fabricated above an insulator material and an underlying active device region, an opening is etched through the insulator layer to the active device region, and filled with an electrically conductive material such as polysilicon, tungsten, copper or aluminum, to provide the interlayer connection.
In forming an electrical connection to an active device region in a silicon semiconductor substrate, a diffusion barrier layer is laid down onto the substrate prior to depositing a conductive material. Such films act to prevent interdiffusion between the silicon and conductive material, which would destroy the contact.
Titanium nitride (TiN) is often used as a diffusion barrier in silicon integrated circuits because it serves as an impermeable barrier to silicon and to metals and other substances attempting to out-diffuse into the silicon. A thin layer of titanium (30-50 nm thick) is typically used under the TiN layer to make direct contact to silicon because it provides lower contact resistance to the silicon substrate than TiN. The titanium (Ti) film is deposited over the silicon substrate by sputtering or CVD, and is then reacted with the silicon during a anneal step to form a layer of titanium silicide (TiSi
x
, predominantly TiSi
2
) at the Ti/Si interface. A layer of TiN is then formed over the TiSi
x
contact layer, for example by CVD, to form a diffusion barrier layer, and a conductive material is deposited to fill the opening. The TiN layer also functions as an adhesion layer for the conductive fill, which is needed in the case of tungsten and copper because of their poor adhesion to insulators.
The continuing trend in the semiconductor industry is toward greater densification and miniaturization of semiconductor devices, including resistors, capacitors, diodes and transistors. This has been achieved, in part, by a reduction in the size of the various components. Such components can include junctions that are formed by doping silicon substrates located on integrated circuit wafers. These junctions are used to form source and drain regions of transistors, among other things, and comprise regions of silicon that are doped with dopants such as boron and phosphorus. Reducing the depth of a junction in a silicon substrate helps in producing an integrated circuit with high circuit density, high speed, and low power consumption, and helps densify and miniaturize integrated circuits. Typically, such shallow junctions are less than about 0.2 microns deep.
Forming an adequate diffusion barrier layer and conductive contact over a shallow junction poses particular problems. The use of shallow junctions requires planar contact interfaces that only slightly penetrate the original silicon substrate, if at all, in order to avoid compromising the shallow junction. However, the use of a contact layer or diffusion barrier film that consumes or intermixes with a substantial portion of the silicon substrate during formation limits the ability to fabricate miniature devices that utilize shallow junctions or comprise other features that require a sharp interface between a silicon substrate and an overlying material.
Therefore, a need exists for a diffusion barrier film that overcomes these problems. It would be desirable to provide an improved diffusion barrier film that can be formed on a silicon substrate with minimal consumption of silicon, forms a sharp interface with the silicon substrate, and promotes adhesion of a contact fill material.
SUMMARY OF THE INVENTION
In one aspect, the invention provides a diffusion barrier layer comprising boron-doped titanium nitride (i.e., titanium boronitride, TiB
x
N
y
). The diffusion barrier layer formed on a semiconductor substrate forms a sharp interface with the underlying substrate with little or no diffusion or intermixing of elements of the diffusion barrier layer into the substrate. The film layer has improved mechanical and adhesive properties with substantially no reduction in conductive properties compared to a titanium nitride layer.
In another aspect, the invention provides methods of forming a diffusion barrier layer over a substrate in the construction of a conductive contact or other semiconductor structure. In an embodiment of the method, a thin layer comprising boron-doped titanium nitride film (i.e., titanium boronitride, TiB
x
N
y
) is deposited by chemical vapor deposition (CVD) onto a semiconductive substrate, preferably to a thickness of about 100 to about 500 angstroms. Preferably, the TiB
x
N
y
layer is deposited from a gas mixture of titanium tetrachloride (TiCl
4
), ammonia (NH
3
), diborane (B
2
H
6
), and one or more carrier gases, by thermal CVD at a pressure of about 1 to about 15 Torr and a temperature of about 550 to about 700° C. The substrate and the diffusion barrier layer define a contact interface therebetween. The method can be utilized, for example, to form a conductive diffusion barrier layer over a semiconductive substrate relative to a contact opening in the fabrication of contacts to electrical components in an integrated circuit such as memory devices. In such a construction, the diffusion barrier layer is interposed between and in contact with the substrate and an electrically conductive fill material within the contact opening.
In another aspect, the invention provides an integrated circuit (IC) device. The IC device can comprise, for example, an array of memory or logic cells, internal circuitry, and at least one conductive contact coupled to the cell array and internal circuitry. In one embodiment, a conductive contact is formed in a contact opening through an insulating dielectric layer, over a thin conductive boron-doped titanium nitride diffusion barrier layer deposited onto and in contact with a semiconductive substrate at the bottom of the contact opening. The conductive contact is in electrical contact with a conductive region or active device area such as a source/drain region of a transistor, or other circuit element. In another embodiment, the IC device can comprise a semiconductive substrate with an overlying insulating dielectric layer and a contact opening formed therethrough that is filled with an electrically conductive fill material, with a boron-doped titanium nitride diffusion barrier layer that is interposed and in contact with the substrate and the fill material.
The invention overcomes problems associated with the use of titanium nitride diffusion barrier films on silicon and other semiconductive substrates, particularly limitations associated with the formation of tungsten plug fills. The present boron-doped titanium nitride films can eliminate the need for an underlying contact layer such as TiSi
x
, which consumes a silicon substrate during formation. The films provide good adhesion of a contact fill material such as tungsten to an underlying silicon substrate, and a barrier to diffusion of silicon into the contact fill material as well as out-diffusion of the fill material and deposition by-products (e.g., fluorine) into the underlying silicon substrate. The films also form a sharp interface with a silicon substrate with little to no diffusion or intermixing of elements into the substrate, a particularly useful feature for the fabrication of miniature components of IC devices, such as DRAMs, SRAMs and FLASH memory devices, including devices that require shallow junctions. In addition, the processes o

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